VLSI-SoC 2026

35th IFIP/IEEE International Conference
on Very Large Scale Integration
Limassol (Cyprus), 11-14 October, St. Raphael Resort.

CALL FOR PAPERS


You can view or download the call for papers here

Research topics of interest include, but are not limited to:

Track 1: Applications and Architectures for AI and ML

This topic deals with advances in the field, focusing on algorithms for developing machine learning models, AI-inspired computation models, approximate computing, and security and privacy issues related to AI and ML applications. It also covers design automation at the intersection of ML/AI algorithms and hardware. Key areas include hardware-efficient architectures for deep learning inference and training, power and hardware-efficient computation methods, low bit-width implementations for activations and weights, dynamic evaluation of neural network models, and efficient methods for few- and one-shot learning algorithms.

  • Application of AI and ML
  • Architectures for AI and ML
Track 2: Communication Architectures and Technologies

This topic deals with advancing communication architectures and technologies, with a special emphasis on 5G/6G networks. It includes innovative solutions in radio frequency (RF) technologies to enhance wireless communication systems, the design and optimization of network-on-chip (NoC) architectures, and ensuring efficient data transfer within complex systems. It also covers next-generation communication by integrating cutting-edge RF technologies into future networks.

  • 5G/6G technologies
  • RF
  • Network on Chip
Track 3: Computing Paradigms

This topic deals with systems and accelerators based on novel computing paradigms, including associated modeling, validation, emulation, programming, integration, design, and exploration techniques. It covers emerging models of computation such as approximate computing, in- and near-memory computing, machine learning, reversible computing, evolutionary computing, and quantum computing, with a focus on architectures, encryption, error correction, and cryogenic computing.

  • Quantum computing
  • Approximate computing
  • Evolutionary computing
  • In-memory computing
Track 4: Digital Circuits Design and Synthesis

This topic deals with the design of digital VLSI systems, which demands a complex design flow from high-level design description to layout description. The flow includes synthesis, verification, optimization, and estimation tools. Optimization is necessary at all levels of design abstraction, with a wide range of possible architectures to implement the same digital system, targeting low power, high performance, and resource efficiency. System-on-Chip optimization increasingly relies on hardware accelerators.

  • Digital circuits
  • High-level and logic-level synthesis
  • Reconfigurable architectures and systems
  • SoC
Track 5: Embedded System Design

This topic deals with embedded systems design, focusing on the modeling, analysis, design, verification, and deployment of application-specific electronic systems that interact with their physical environment. The goal is to choose and design the proper combination of hardware and software components to meet system-level goals like speed, efficiency, reliability, security, and safety. Areas of interest include real-time systems, cyber-physical systems, parallel computing, networked systems, and dependable systems, with emphasis on model-based design, verification, and embedded software platforms.

  • Embedded software and toolchains
  • Edge computing
  • Cloud computing
  • Parallel computing and architectures
Track 6: Emerging Technologies and Applications

This topic deals with emerging technologies such as artificial intelligence, machine learning, deep learning, edge computing, quantum computing, augmented reality, virtual reality, big data, and blockchain. Applications include the Internet of Things (IoT), autonomous vehicles, agrifood, recommendation systems, robotics, personalized healthcare, smart homes, and smart cities. From the technological point of view, it also encompasses 3D integration, chiplets, non-volatile memories, silicon photonics, design using advanced transistors (sub 2nm, CFETs, 2D material based).

  • Emerging technologies
Track 7: Low-Power, Energy-Efficient and Thermal-Aware Design

This topic deals with algorithms, design techniques, circuits, and tools for modeling, estimating, or optimizing power consumption and thermal performance in electronic circuits and systems. It covers ultra-low-power systems (e.g., for portable/wearable devices at the edge of the IoT) to high-performance systems (like data centers) and large-scale battery systems (such as electric vehicles). Areas of interest include dynamic/adaptive management techniques for temperature/power/energy optimization, cross-layer hardware/software optimization strategies, and new circuits and architectures for low-power, energy-efficient distributed, and heterogeneous systems.

  • Cryogenic processors
  • Low-power design
Track 8: Security

This topic deals with cybersecurity issues related to the hardware infrastructure underlying computing, storage, or communication systems, particularly when hardware can no longer be considered a root of trust. It covers hardware threats and vulnerabilities, including physical attacks, Trojan horses, IP piracy, IC counterfeiting, backdoors, tampering, and reverse engineering. It also addresses hardware Trojan detection, side-channel attacks, and countermeasures, as well as the security of emerging technologies and physically unclonable functions (PUFs).

  • Hardware security
  • IP Security
  • Secure Hardware Synthesis
Track 9: Sensing and Signal Processing Technologies

This topic deals with sensing and signal processing technologies within intelligent environments and bio-related well-being applications. It explores the development and integration of sensor technologies, innovative signal processing techniques, and energy-efficient read-out circuits for environmental and in-body sensing applications. It also examines the design and architecture of signal processing systems tailored for smart environments, ensuring scalability, reliability, and energy efficiency.

  • Sensors and biosensors
  • Signal processing
  • Circuits and architectures for signal processing
Track 10: Smart Systems, Devices and Applications

This topic deals with IoT systems and applications, focusing on smart systems (e.g., smart cities, smart cars) and smart applications (e.g., smart irrigation, smart wildfire detection). It also covers systems and applications based on big data, cyber-physical systems, and smart sensors for IoT applications, including hardware and software security for these systems.

  • IoT, industrial IoT, IoMT
  • Smart systems
  • Cyber-physical systems
  • Big data
Track 11: System Specification, Simulation and Verification

This topic deals with modeling and specification methodologies for complex HW-SW systems, including simulation-based, semi-formal, or formal validation and verification of SoCs and emerging architectures at any level. It covers testbench and assertion generation, coverage metrics, checker synthesis and optimization, and acceleration-driven and emulation-based approaches for verification and validation.

  • Simulation
  • Verification
  • System specification and modelling
  • Hardware description languages
  • Prototyping and virtual prototyping
Track 12: Test and Dependability

This topic deals with test and dependability of digital, analog/RF, mixed-signal, and embedded systems. It covers defect and fault modeling, fault simulation, test generation, design-for-test, on-line test, test infrastructure, failure analysis, fault diagnosis, fault tolerance, and functional safety and reliability.

  • Design for testability
  • Fault tolerance
  • Fault modelling
  • Testing
  • Reliability

DEADLINES

Abstract registration: April 20, 2026
Full papers submission: April 27, 2026
Special session proposal: April 27, 2026
Notification of acceptance: June 22, 2026
Camera ready: July 13, 2026



AUTHORS' GUIDELINES


PAPERS SUBMISSION

Papers should present original research and industrial results not published or submitted for publication in other forums. Electronic submission in PDF format to easychair VLSI-SOC 2026 website is required. The proceedings will be published by IEEE and will be made available through IEEE Xplore. A selection of the conference best papers will be invited to submit an extended version to be included as chapters of a book to be published by Springer.


PAPERS FORMAT

Papers should not exceed 6 pages (single-spaced, 2 columns, 10pt font). Submissions should be camera-ready, following the IEEE proceedings specifications.


PAPERS PUBBLICATION AND SPEAKERS REGISTRATION

Papers will be accepted for regular or poster presentation at the conference. Every accepted paper MUST have at least one author registered at the conference by the time the camera-ready paper is submitted; the registered author is also expected to attend the conference and present the paper. A limited number of travel grants are available to needy PhD students from emerging countries.


INSTRUCTIONS FOR ACCEPTED PAPERS

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CAMERA-READY SUBMISSIONS


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